Recently, the communication speed for local area networks has been greatly increased (e.g., FDDI, Fast Ethernet, ATM can run at a rate higher than 100Mbps). With the increasing acceptance of the ATM technology, there requires a significant development effort in building all the related ATM components, subsystems, and systems. There are several ATM host interfaces and chipsets being manufactured. Designing of the above subsystems and associated components has focused more on providing the basic transport capability for use in experimenting the ATM technology. Although there are several commercial ATM products available, experience in using such a technology is still in the early stage.

In this homepage, we show our design of the high speed ATM/TAXI network interface cards. Our motivation for building such a prototype NIC subsystem is to conduct further research on multimedia applications and their associated control mechanisms . In these cards, we have designed two ASICs that implementing the ATM/AAL functions. We have also designed hardware blocks for handling the TAXI interface between ATM chipsets and TAXI chipsets (ATM physical interface layer). More details are in the following.

    This ATM NIC project started in Summer 1994, following
several prior years' efforts in the ATM-related IC design. 
Through the efforts of the hardware team of the Communications &
Networking (C&N) group in the EE department, National Chung Cheng 
University, two versions of the ATM network interface cards have 
been built. Now, the team members are improving version 2 card to 
Version 2.1. And at the same time, version 3 card is near 
completion.......

Click on the following icons for more information about the three versions of the ATM NIC.

Ver. 1	Ver. 2	Ver. 3
Related Document